(Hong Kong)
Product Summary
The MT4LC8M8E1TG-5F is an 8 Meg x 8 DRAM. The MT4LC8M8E1TG-5F is a high-speed CMOS, dynamic random-access memory device containing 67,108,864 bits organized in a x8 configuration. The device is functionally organized as 8,388,608 locations containing eight bits each. The 8,388,608 memory locations are arranged in 8,192 rows by 1,024 columns for the MT4LC8M8E1 or 4,096 rows by 2,048 columns for the MT4LC8M8B6.
Parametrics
MT4LC8M8E1TG-5F absolute maximum ratings: (1)Voltage on VCC Relative to VSS: -1V to +4.6V; (2)Voltage on NC, Inputs or I/O Pins Relative to VSS: -1V to +4.6V; (3)Operating Temperature, TA (ambient): 0℃ to +70℃; (4)Storage Temperature (plastic): -55℃ to +150℃; (5)Power Dissipation: 1W.
Features
MT4LC8M8E1TG-5F features: (1)Single +3.3V ±0.3V power supply; (2)Industry-standard x8 pinout, timing, functions, and packages; (3)13 row, 10 column addresses (E1) or 12 row, 11 column addresses (B6); (4)High-performance CMOS silicon-gate process; (5)All inputs, outputs and clocks are LVTTL-compatible; (6)FAST PAGE MODE (FPM) access; (7)4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms; (8)Optional self refresh (S) for low-power data retention.
Diagrams
