(Hong Kong)
Product Summary
The K4H560838H-UCCC is a double data rate synchronous DRAM organized as 4×16,777,216 / 4x 8,388,608 / 4x 4,194,304 words by 4/8/16bits, fabricated with high performance CMOS technology of SAMSUNG. The K4H560838H-UCCC features with Data Strobe allow extremely high performance up to 400Mb/s per pin. Range of operating frequencies, programmable burst length and programmable latencies allow the K4H560838H-UCCC to be useful
for a variety of high performance memory system applications.
Parametrics
K4H560838H-UCCC absolute maximum ratings: (1) Voltage on any pin relative to Vss, VIN, VOUT: -0.5 to 3.6V; (2) Voltage on VDD& VDDQ supply relative to Vss, VDD, VDDQ: -1.0 to 3.6V; (3) Storage temperature TSTG: -55 to +150°C; (4) Power Dissipation PD: 1.5W; (5) Short Circuit Current Ios: 50mA.
Features
K4H560838H-UCCC features: (1) VDD: 2.5V±0.2V, VDDQ: 2.5V±0.2V 2V for DDR266, 33; (2) Double-data-rate architecture; two data transfers per clock cycle; (3) Four banks operation; (4) DLL aligns DQ and DQS transition with CK transition; (5) MRS cycle with address key programs; (6) All inputs except data & DM are sampled at the positive going edge of the system clock(CK) ; (7) Data I/O transactions on both edges of data strobe; (8) 66pin TSOP II Pb-Free package.
Diagrams
