(Hong Kong)
Product Summary
The CY7C1041BNV33L-12ZXC is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) of the CY7C1041BNV33L-12ZXC is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17).
Parametrics
CY7C1041BNV33L-12ZXC absolute maximum ratings: (1)Storage Temperature: –65℃ to +150℃; (2)Ambient Temperature with Power Applied: –55℃ to +125℃; (3)Supply Voltage on VCC to Relative GND: –0.5V to +4.6V; (4)DC Voltage Applied to Outputs in High Z State: –0.5V to VCC + 0.5V; (5)DC Input Voltage: –0.5V to VCC + 0.5V; (6)Current into Outputs (LOW): 20 mA.
Features
CY7C1041BNV33L-12ZXC features: (1)High speed. tAA = 12 ns; (2)Low active power 612 mW (max.); (3)Low CMOS standby power (Commercial L version) 1.8 mW (max.); (4)2.0V Data Retention (660 μW at 2.0V retention); (5)Automatic power-down when deselected; (6)TTL-compatible inputs and outputs; (7)Easy memory expansion with CE and OE features.
Diagrams
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 CY7C1041BNV33L-12ZXC |
Cypress Semiconductor |
SRAM 256K x 16 ASYNC SRAM |
Data Sheet |
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CY7C1041BNV33L-12ZXCT |
Cypress Semiconductor |
SRAM 256K x 16 ASYNC SRAM |
Data Sheet |
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